JOB RESPONSIBILITIES:
- Design and simulate Logic gates circuit;
- Characterize Logic library;
- Build and validate Logic library;
- Prepare Logic library PnR (Place and Route) package.
REQUIRED QUALIFICATIONS:
- BS/ MS in Electrical Engineering;
- Good background in standard cells, including all aspects of library development, including standard cell circuit design, architecture, physical design and DRC/LVS;
- Experience with Low Power circuits designs and techniques;
- Working knowledge of physical electrical design space, including power, timing performance technology effects on physical and electrical behavior;
- Proven technical skills and ability to manage multiple priorities;
- Ability to work on multiple projects.
APPLICATION PROCEDURES:
Please send resumes to: hr.armenia@viragelogic.com .
Please mention the position title you are applying for. Only shortlisted candidates will be interviewed.
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